ITRI's MOSAIC (Memory-cube Operability in a Stacked AI Chip for Generative AI) won a 2024 R&D 100 Award in the IT/Electrical category. MOSAIC offers a solution to address the cost and scalability challenges associated with AI/GAI chips. It integrates logic computation and memory, enabling a flexible and scalable 3D stacking technology. MOSAIC's innovative 3D stacking chip design significantly reduces the transmission distance between chips from micrometers (micrometre) to nanometers (nm), cutting heat generation by 90% and reducing costs by 80%. With modular, multi-layer, and scalable features, it meets the application needs of various AI products, ranging from portable devices and edge computing units to HPC servers. By employing flexible and more efficient wafer manufacturing solutions, AI systems can achieve enhanced performance and deployment capabilities while concurrently lowering energy consumption.

MOSAIC was developed in collaboration with PSMC (Powerchip Semiconductor Manufacturing Corporation), a semiconductor foundry that specializes in providing wafer manufacturing services for both logic and memory applications. The prototype of MOSAIC was created from two 12-inch wafers fabricated utilizing PSMC's 40nm logic and 25nm DRAM processes. It employs wafer stacking technology to simultaneously transfer data between logic circuits and DRAM.